The present invention relates to improvements in television vertical synchronizing filters.
In a typical video communication system it is necessary to synchronize the horizontal and vertical sweeps of the video signal so that the displayed picture of the receiver is an accurate reproduction of the picture originally transmitted. Normally, this is done by transmitting synchronizing (sync) signals corresponding to the appropriate horizontal and vertical periods on the video signal. These sync signals are typically combined in a composite sync signal which is superimposed on the transmitted video signal. Thus, in order to synchronize the display of the video signal at the receiver, one detects this signal and initiates the horizontal and vertical sweeps of the receiver display scan at the appropriate times.
The present invention concerns the detection of vertical sync signals in the composite sync signal and provides for the generation of a suitable drive pulse for synchronizing the receiver vertical scan circuitry when the vertical period is detected.
Traditionally, the vertical sync information has been extracted from the composite sync signal through the use of analog circuits requiring many relatively expensive parts to achieve the requisite circuit performance. However, even though costly, the analog circuits are particularly sensitive to a noisy circuit environment, sometimes causing inadequate performance and a poor quality picture at the receiver. This occurs when the television receiver is used in conjunction with devices such as video recorders which can subject the receiver to an extremely noisy electronic environment or output nonstandard sync signals. It is therefore desirable to incorporate a high level of noise immunity into the vertical sync circuit to avoid the false generation of vertical sync pulses during noisy circuit operation.
The present invention is concerned further with achieving a vertical sync filter implemented on an integrated circuit. An examination of the various digital up/down count systems shows that they use numerous gates. In a fully integrated circuit chip, the space required by those numerous gates becomes excessive. Consequently, the prior art up/down counting systems are not suitable in the environment in which the present invention is to be used and therefore do not meet the present objectives. It is desirable to minimize the IC gate count and external parts, which represents significant cost savings, while at the same time offering performance comparable to or better than existing analog filters.
Accordingly, it is a primary object of the invention to provide a digital vertical sync filter which performs as well as existing analog filters while minimizing both the number of external parts and integrated circuit gates.
It is a further object of the invention to provide comparable noise immunity within the normal operation of the latter to avoid false generation of vertical sync pulses.
It is still a further object of the invention to provide for the generation of a vertical sync pulse having very little variation in width.